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An Ultra-Low-Energy, Variation-Tolerant FPGA Architecture Using Component-Specific Mapping
2013 · California Institute of Technology · doctoral · Computer Science
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@misc{academicancestry_caltechthesis_caltechthesis_7226,
author = {{Academic Ancestry}},
title = {{An Ultra-Low-Energy, Variation-Tolerant FPGA Architecture Using Component-Specific Mapping: record of a thesis}},
year = {2026},
url = {https://academicancestry.org/thesis/caltechthesis/caltechthesis%3A7226},
note = {read on 2026-10-23}
}apa
Academic Ancestry. (2026, October 23). An Ultra-Low-Energy, Variation-Tolerant FPGA Architecture Using Component-Specific Mapping: Record of a thesis [Read on 2026-10-23]. https://academicancestry.org/thesis/caltechthesis/caltechthesis%3A7226